Lisa Su spent Tuesday in Taipei doing the work that matters most for AMD right now: not designing chips, but negotiating for the capacity to manufacture them. AMD’s CEO said the company plans to substantially increase supply in 2027 through its Taiwanese supply chain, particularly with TSMC, as surging demand for AI-related processors continues to outstrip supply. AMD closed at a record $649.42 that same day, up 2.8%, with Citigroup adding fuel by raising its price target to $800 from $575 and lifting its 2030 CPU total addressable market forecast to $300 billion. The bull case is powerful. The bear case is structural.
The Bull Case
The demand signal backing Su’s promise is among the clearest in the semiconductor industry right now. Reports citing supply-chain checks and an industry tipster say AMD’s 2027 production allocation for its next-generation EPYC Venice server processors is already spoken for, with customers now booking 2028 delivery. Morgan Stanley has been cited as modeling about 6.75 million Venice units for 2027, up from roughly 1.25 million in 2026, and at a blended average selling price of approximately $7,691 across 31 SKUs. If those assumptions hold, a fully booked 2027 allocation would imply roughly $51 billion in revenue visibility from the server CPU segment alone.
Citigroup analyst Atif Malik framed the opportunity around agentic AI, arguing it could drive a much larger wave of compute demand than traditional chatbots. Malik believes the CPU total addressable market expands from about $29 billion in 2025 to $300 billion in 2030, which works out to roughly a 60% compound annual growth rate. He has pointed to a “CPU renaissance” and has cited Meta as one of AMD’s largest server customers.
There is also real operating momentum underneath the story. AMD said second-quarter Data Center revenue jumped 107% year over year to $6.7 billion, driven by EPYC processors and Instinct MI350 series GPUs.
Su is also planning further out than she once did. She has said AMD used to plan capacity one or two years in advance and is now coordinating three to five years out to ensure wafer, packaging, and other capacity expands together. That shift matters: it signals AMD is treating the shortage as secular, not cyclical.
The Bear Case
Here is the problem Su did not solve in Taipei: AMD is a fabless company. Every wafer it ships requires TSMC to produce it, and TSMC is already stretched across the entire AI ecosystem. While it is widely reported that leading-edge capacity is tight for years, public evidence for a blanket claim that TSMC’s 2nm and 3nm nodes are fully booked through 2027 to 2028 is thin. What is clearer is that advanced packaging remains a bottleneck. Supply-chain reporting and sector research have repeatedly estimated Nvidia controls roughly 60% of TSMC’s CoWoS advanced packaging allocation, leaving the rest to be split among AMD and others, including the packaging its Instinct accelerators and high-core-count EPYC parts require.
Su did not put a number on the supply increase, so it is hard to say how much relief can be expected. She has called CoWoS and advanced packaging absolutely critical for AMD’s high-performance chips. That candor cuts both ways. AMD needs TSMC to simultaneously ramp advanced wafer output, expand CoWoS capacity, and manage competing priority requests from Apple and Nvidia, all on a timeline AMD does not control. In July 2026, Reuters reported TSMC was discussing foundry price increases of up to 10% beginning in 2027. Rising input costs can compress AMD’s margins even as revenue grows.
Memory is a second constraint: Su has flagged that high-bandwidth memory remains supply-constrained, and Micron has said it has more than 75% of its fiscal 2027 shipments committed.
Where the Evidence Leads
Su’s Taipei trip was not a press event. It was a procurement mission, and the urgency reflects how tight conditions genuinely are. The bull argument rests on real demand signals: reports of a booked-out Venice allocation stretching into 2028, and strong Data Center growth. The rest, including unit counts and pricing, is best treated as model-driven until AMD itself confirms the contours of the order book.
The bear argument rests on an equally real structural constraint: AMD cannot unilaterally deliver on a supply promise when the limiting factor sits inside a Taiwanese foundry that also serves Nvidia, Apple, and every other customer competing for the same nodes. AMD is now valued at about $1 trillion, and that valuation carries an implicit promise to deliver volume at scale. Su’s Taiwan meetings reflect the reality that silicon supply, not chip design, is now the limiting factor.
The bull case is better supported today, but its credibility depends entirely on TSMC executing a ramp that no single AMD executive can guarantee. Watch TSMC’s quarterly capacity commentary, AMD’s gross margin trajectory, and any update to CoWoS allocation ratios. Those will tell you whether Su’s promise survives contact with the supply chain.
